RWPHI (ETR) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

RWPHI (ETR) Register Description

Register NameRWPHI
Offset Address0x000000003C
Absolute Address 0x00FE97003C (CORESIGHT_SOC_ETR)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionIn the ETR configuration, memory addresses are 40 bits wide. The RAM Write Pointer High Register sets the upper 8 bits of the write pointer that is used (together with the contents of the RWP register) to write entries into the trace memory. See the RWP register for further details.

RWPHI (ETR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
RWPHI 7:0rwNormal read/write0x0Bits[39:32] of the write pointer