SEC_CTRL (EFUSE) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

SEC_CTRL (EFUSE) Register Description

Register NameSEC_CTRL
Offset Address0x0000001058
Absolute Address 0x00FFCC1058 (EFUSE)
Width32
TyperoRead-only
Reset Value0x00000000
DescriptionSecurity Control

SEC_CTRL (EFUSE) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
PPK1_INVLD31:30roRead-only0x0Revokes PPK1
PPK1_WRLK29roRead-only0x0Locks writing to PPK1 eFuses
PPK0_INVLD28:27roRead-only0x0Revokes PPK0
PPK0_WRLK26roRead-only0x0Locks writing to PPK0 eFuses
RSA_EN25:11roRead-only0x0Enabels RSA Authentication during boot. All boots must be authenticated
SEC_LOCK10roRead-only0x0Disables the reboot into JTAG mode when doing a secure lockdown.
PROG_GATE_2 9roRead-only0x0Disables the PROG_GATE feature in the PPD.
PROG_GATE_1 8roRead-only0x0Disables the PROG_GATE feature in the PPD.
PROG_GATE_0 7roRead-only0x0Disables the PROG_GATE feature in the PPD.
DFT_DIS 6roRead-only0x0Disables DFT
boot mode. This boot mode does not execute the PMU / CSU ROM
JTAG_DIS 5roRead-only0x0Disables the JTAG controller. The only instructions available are BYPASS and IDCODE.
ERROR_DIS 4roRead-only0x0Supresses error output from the PMU
BBRAM_DIS 3roRead-only0x0Disables the BBRAM key
ENC_ONLY 2roRead-only0x0Requeires all boots to be encrypted using the eFuse key.
AES_WRLK 1roRead-only0x0Locks writing to the AES key section of eFuse
AES_RDLK 0roRead-only0x0Locks the AES key CRC check function