SICR (APM) Register Description
| Register Name | SICR |
|---|---|
| Offset Address | 0x0000000028 |
| Absolute Address |
0x00FD490028 (APM_CCI_INTC) 0x00FFA00028 (APM_INTC_OCM) 0x00FFA10028 (APM_LPD_FPD) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000100 |
| Description | Sample Interval Control |
SICR (APM) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:9 | razRead as zero | 0x0 | Reserved |
| MET_CNT_RST | 8 | rwNormal read/write | 0x1 | 1: Resets metric counters when sample interval timer expires or when the sample register is read. 0: Metric Counters are not reset when sample interval counter lapses or when the sample register is read. |
| Reserved | 7:2 | razRead as zero | 0x0 | Reserved |
| LOAD | 1 | rwNormal read/write | 0x0 | 1: Loads the Sample Interval register value into the Sample Interval Counter. |
| ENABLE | 0 | rwNormal read/write | 0x0 | 1: Enables the down counter. Before enabling, the counter should be loaded with the sample Interval Register value. |