SPSCR (STM) Register Description
| Register Name | SPSCR |
|---|---|
| Offset Address | 0x0000000E60 |
| Absolute Address | 0x00FE9C0E60 (CORESIGHT_SOC_STM) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | Enable a debugger to program which stimulus ports the STMSPER and STMSPTER apply to. |
SPSCR (STM) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| PORTSEL | 31:20 | rwNormal read/write | 0 | This field defines which stimulus ports the STMSPTER and/or STMSPER apply to |
| PORTCTL | 1:0 | rwNormal read/write | 0x0 | This defines how the port selection is applied: 0: Not used 1: STMSPTER_only 2: Reserved 3: STMSPER_and_STMSPTER |