SPTER (STM) Register Description
Register Name | SPTER |
---|---|
Offset Address | 0x0000000E20 |
Absolute Address | 0x00FE9C0E20 (CORESIGHT_SOC_STM) |
Width | 32 |
Type | rwNormal read/write |
Reset Value | 0x00000000 |
Description | Enable Trigger Generation on writes to enabled stimulus port registers. |
SPTER (STM) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
SPTE | 31:0 | rwNormal read/write | 0x0 | Bit mask to enable trigger generation from the stimulus port registers, with one bit per stimulus port register0 = disabled1 = enabled |