SSCSR0 (A53_ETM_3) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

SSCSR0 (A53_ETM_3) Register Description

Register NameSSCSR0
Offset Address0x00000002A0
Absolute Address 0x00FEF402A0 (CORESIGHT_A53_ETM_3)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionSingle-Shot Comparator Status Register 0

SSCSR0 (A53_ETM_3) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
STATUS31rwNormal read/write0Single-shot status bit. Indicates if any of the selected comparators have matched.
STATUS must be written to set an initial state when configuring the trace unit, if the single-shot comparator is to be used.
DV 2roRead-only0x0Data value comparator support bit. Indicates if the trace unit supports data address with data value comparisons
DA 1roRead-only0x0Data address comparator support bit. Indicates if the trace unit supports data address comparisons
INST 0roRead-only0Instruction address comparator support bit. Indicates if the trace unit supports instruction address comparisons