SWINC_EL0 (A53_PMU_1) Register Description
Register Name | SWINC_EL0 |
---|---|
Offset Address | 0x0000000CA0 |
Absolute Address | 0x00FED30CA0 (CORESIGHT_A53_PMU_1) |
Width | 32 |
Type | woWrite-only |
Reset Value | 0x00000000 |
Description | Performance Monitors Software Increment Register |
SWINC_EL0 (A53_PMU_1) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
P | 30:0 | woWrite-only | 0 | Event counter software increment bit for EVCNTR<x>.P<x> is WI if x >= PMCR_EL0.N, the number of implemented counters.Otherwise, the effects of writing to this bit are: |