Supported_test_pattern_modes (TPIU) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

Supported_test_pattern_modes (TPIU) Register Description

Register NameSupported_test_pattern_modes
Offset Address0x0000000200
Absolute Address 0x00FE980200 (CORESIGHT_SOC_TPIU)
Width32
TyperoRead-only
Reset Value0x00000000
DescriptionThe pattern generator unit provides a set of known bit sequences or patterns that can be output over the Trace Port and be detected by the TPA or other associated trace capture device.

Supported_test_pattern_modes (TPIU) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
PCONTEN17roRead-only0x0Indicates whether Continuous Mode is supported.
PTIMEEN16roRead-only0x0Indicates whether Timed Mode is supported.
PATF0 3roRead-only0x0FF/00 pattern supported to be output over the Trace Port.
PATA5 2roRead-only0x0AA/55 pattern supported to be output over the Trace Port.
PATW0 1roRead-only0x0Walking 0s Pattern supported to be output over the Trace Port.
PATW1 0roRead-only0x0Walking 1s Pattern supported to be output over the Trace Port.