TEEVR (R5_ETM_0) Register Description
| Register Name | TEEVR |
|---|---|
| Offset Address | 0x0000000020 |
| Absolute Address | 0x00FEBFC020 (CORESIGHT_R5_ETM_0) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | TraceEnable Event Register |
TEEVR (R5_ETM_0) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Event | 16:0 | rwNormal read/write | 0 | TraceEnable event |