TRAN_EGRESS_SRC_BASE_LO (AXIPCIE_EGRESS) Register Description
| Register Name | TRAN_EGRESS_SRC_BASE_LO |
|---|---|
| Offset Address | 0x0000000010 |
| Absolute Address |
0x00FD0E0C10 (AXIPCIE_EGRESS0) 0x00FD0E0C30 (AXIPCIE_EGRESS1) 0x00FD0E0C50 (AXIPCIE_EGRESS2) 0x00FD0E0C70 (AXIPCIE_EGRESS3) 0x00FD0E0C90 (AXIPCIE_EGRESS4) 0x00FD0E0CB0 (AXIPCIE_EGRESS5) 0x00FD0E0CD0 (AXIPCIE_EGRESS6) 0x00FD0E0CF0 (AXIPCIE_EGRESS7) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000000 |
| Description | Egress AXI Translation - Source Address Low |
TRAN_EGRESS_SRC_BASE_LO (AXIPCIE_EGRESS) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| egress_src_base_lo | 31:12 | rwNormal read/write | 0x0 | egress_src_base[31:12]. |
| Reserved | 11:0 | roRead-only | 0x0 |