TRAN_INGRESS_DST_BASE_LO (AXIPCIE_INGRESS) Register Description
| Register Name | TRAN_INGRESS_DST_BASE_LO |
|---|---|
| Offset Address | 0x0000000018 |
| Absolute Address |
0x00FD0E0818 (AXIPCIE_INGRESS0) 0x00FD0E0838 (AXIPCIE_INGRESS1) 0x00FD0E0858 (AXIPCIE_INGRESS2) 0x00FD0E0878 (AXIPCIE_INGRESS3) 0x00FD0E0898 (AXIPCIE_INGRESS4) 0x00FD0E08B8 (AXIPCIE_INGRESS5) 0x00FD0E08D8 (AXIPCIE_INGRESS6) 0x00FD0E08F8 (AXIPCIE_INGRESS7) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000000 |
| Description | Ingress AXI Translation - Destination Address Low |
TRAN_INGRESS_DST_BASE_LO (AXIPCIE_INGRESS) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| ingress_dst_base_lo | 31:12 | rwNormal read/write | 0x0 | ingress_dst_base[31:12]. |
| Reserved | 11:0 | roRead-only | 0x0 |