TSFREQR (STM) Register Description
| Register Name | TSFREQR |
|---|
| Offset Address | 0x0000000E8C |
|---|
| Absolute Address |
0x00FE9C0E8C (CORESIGHT_SOC_STM)
|
|---|
| Width | 32 |
|---|
| Type | rwNormal read/write |
|---|
| Reset Value | 0x00000000 |
|---|
| Description | Timestamp Counter Frequency. |
|---|
This read-write register is used to indicate the frequency of the timestamp counter. The unit of measurement is increments per second. When the STPv2 protocol is used, this register contains the value output in the FREQ and FREQ_TS packets. The timestamp frequency is output in the STPv2 protocol at every synchronization point when STMTCSR.TSEN is b1.
TSFREQR (STM) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|
| FREQ | 31:0 | rwNormal read/write | 0x0 | The timestamp frequency in Hz |