Trigger_multiplier (TPIU) Register Description
| Register Name | Trigger_multiplier |
|---|---|
| Offset Address | 0x0000000108 |
| Absolute Address | 0x00FE980108 (CORESIGHT_SOC_TPIU) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | This register contains the selectors for the Trigger Counter Multiplier. Several multipliers can be selected to create the required multiplier value, that is, any value between 1 and approximately 2x10^9. The default value is multiplied by 1, 0x0.Writing to this register causes the internal trigger counter and the state in the multipliers to be reset to initial count position, that is, trigger counter is reloaded with the Trigger Counter Register value and all multipliers are reset. |
Trigger_multiplier (TPIU) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| MULT64K | 4 | rwNormal read/write | 0x0 | Multiply the Trigger Counter by 65536 (2^16). |
| MULT256 | 3 | rwNormal read/write | 0x0 | Multiply the Trigger Counter by 256 (2^8). |
| MULT16 | 2 | rwNormal read/write | 0x0 | Multiply the Trigger Counter by 16 (2^4). |
| MULT4 | 1 | rwNormal read/write | 0x0 | Multiply the Trigger Counter by 4 (2^2). |
| MULT2 | 0 | rwNormal read/write | 0x0 | Multiply the Trigger Counter by 2 (2^1). |