VCR (R5_DBG_0) Register Description
| Register Name | VCR |
|---|---|
| Offset Address | 0x000000001C |
| Absolute Address | 0x00FEBF001C (CORESIGHT_R5_DBG_0) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | Vector Catch Register |
VCR (R5_DBG_0) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| FIQ | 7 | rwNormal read/write | 0 | Vector catch enable, FIQ. |
| IRQ | 6 | rwNormal read/write | 0 | Vector catch enable, IRQ. |
| Data_Abort | 4 | rwNormal read/write | 0 | Vector catch enable, data abort. |
| Prefetch_Abort | 3 | rwNormal read/write | 0 | Vector catch enable, prefetch abort. |
| SVC | 2 | rwNormal read/write | 0 | Vector catch enable, SVC. |
| Undefined | 1 | rwNormal read/write | 0 | Vector catch enable, Undefined Instruction. |
| Reset | 0 | rwNormal read/write | 0 | Vector catch enable, reset. |