VIIECTLR (A53_ETM_2) Register Description
| Register Name | VIIECTLR |
|---|---|
| Offset Address | 0x0000000084 |
| Absolute Address | 0x00FEE40084 (CORESIGHT_A53_ETM_2) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | ViewInst Include-Exclude Control Register |
VIIECTLR (A53_ETM_2) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| EXCLUDE | 23:16 | rwNormal read/write | 0x0 | Defines the address range comparators for ViewInst exclude control. One bit is provided for each implemented Address Range Comparator. |
| INCLUDE | 7:0 | rwNormal read/write | 0x0 | Include range field. Selects which address range comparator pairs are in use with ViewInst include control. Each bit represents an address range comparator pair, so bit[m] controls the selection of address range comparator pair m. |