VMIDCVR0 (A53_ETM_0) Register Description
Register Name | VMIDCVR0 |
---|---|
Offset Address | 0x0000000640 |
Absolute Address | 0x00FEC40640 (CORESIGHT_A53_ETM_0) |
Width | 32 |
Type | rwNormal read/write |
Reset Value | 0x00000000 |
Description | VMID Comparator Value Register 0 |
VMIDCVR0 (A53_ETM_0) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
VALUE | 31:0 | rwNormal read/write | 0x0 | VMID value. The implemented width of this field is IMPLEMENTATION DEFINED, and is set by IDR2.VMIDSIZE. Unimplemented bits are RAZ/WI.After a processor reset, the ETM architecture assumes that the VMID is zero until the processor updates the VMID. |