VPLL_CFG (CRF_APB) Register Description
| Register Name | VPLL_CFG |
|---|---|
| Offset Address | 0x000000003C |
| Absolute Address | 0x00FD1A003C (CRF_APB) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | VPLL Integer Helper Data Configuration. |
VPLL_CFG (CRF_APB) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| LOCK_DLY | 31:25 | rwNormal read/write | 0x0 | Lock circuit configuration settings for lock windowsize |
| LOCK_CNT | 22:13 | rwNormal read/write | 0x0 | Lock circuit counter setting |
| LFHF | 11:10 | rwNormal read/write | 0x0 | PLL loop filter high frequency capacitor control |
| CP | 8:5 | rwNormal read/write | 0x0 | PLL charge pump control |
| RES | 3:0 | rwNormal read/write | 0x0 | PLL loop filter resistor control |