V_BLEND_CHROMA_KEY_COMP1 (DISPLAY_PORT) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

V_BLEND_CHROMA_KEY_COMP1 (DISPLAY_PORT) Register Description

Register NameV_BLEND_CHROMA_KEY_COMP1
Offset Address0x000000A1D4
Absolute Address 0x00FD4AA1D4 (DISPLAY_PORT)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionV_BLEND_CHROMA_KEY_COMP1:

V_BLEND_CHROMA_KEY_COMP1 (DISPLAY_PORT) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:28razRead as zero0x0
MAX27:16rwNormal read/write0x0R component of the key maximum value
Reserved15:12razRead as zero0x0
MIN11:0rwNormal read/write0x0R component of the key minimum value