V_BLEND_IN1CSC_COEFF2 (DISPLAY_PORT) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

V_BLEND_IN1CSC_COEFF2 (DISPLAY_PORT) Register Description

Register NameV_BLEND_IN1CSC_COEFF2
Offset Address0x000000A04C
Absolute Address 0x00FD4AA04C (DISPLAY_PORT)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionV_BLEND_IN1CSC_COEFF2:Description same as V_BLEND_IN1CSC_COEFF0

V_BLEND_IN1CSC_COEFF2 (DISPLAY_PORT) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:15razRead as zero0x0
Y2R_C214:0rwNormal read/write0x0Signed representation of value.