WFAR (R5_DBG_1) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

WFAR (R5_DBG_1) Register Description

Register NameWFAR
Offset Address0x0000000018
Absolute Address 0x00FEBF2018 (CORESIGHT_R5_DBG_1)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionThe Watchpoint Fault Address Register

WFAR (R5_DBG_1) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Address31:1rwNormal read/write0This is the address of the watchpointed instruction. When a watchpoint occurs in Arm state, the WFAR contains the address of the instruction causing it plus an offset of 0x8. When a watchpoint occurs in Thumb state, the offset is plus 0x4.