WR_THRSLD (DDR_QOS_CTRL) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

WR_THRSLD (DDR_QOS_CTRL) Register Description

Register NameWR_THRSLD
Offset Address0x0000000010
Absolute Address 0x00FD090010 (DDR_QOS_CTRL)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionSet Value for Write CAM Threshold

WR_THRSLD (DDR_QOS_CTRL) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:7razRead as zero0x0Reserved for future use
VALUE 6:0rwNormal read/write0x0Write CAM Threshold Level