ZDMA_CH_DST_START_MSB (ZDMA) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

ZDMA_CH_DST_START_MSB (ZDMA) Register Description

Register NameZDMA_CH_DST_START_MSB
Offset Address0x0000000164
Absolute Address 0x00FFA80164 (ADMA_CH0)
0x00FFA90164 (ADMA_CH1)
0x00FFAA0164 (ADMA_CH2)
0x00FFAB0164 (ADMA_CH3)
0x00FFAC0164 (ADMA_CH4)
0x00FFAD0164 (ADMA_CH5)
0x00FFAE0164 (ADMA_CH6)
0x00FFAF0164 (ADMA_CH7)
0x00FD500164 (GDMA_CH0)
0x00FD510164 (GDMA_CH1)
0x00FD520164 (GDMA_CH2)
0x00FD530164 (GDMA_CH3)
0x00FD540164 (GDMA_CH4)
0x00FD550164 (GDMA_CH5)
0x00FD560164 (GDMA_CH6)
0x00FD570164 (GDMA_CH7)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionDST DSCR Start Address MSB Register

ZDMA_CH_DST_START_MSB (ZDMA) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:17razRead as zero0x0Reserved for future use
ADDR16:0rwNormal read/write0x0Start Address MSB register for DST descriptor fetch