ZDMA_CH_FCI (ZDMA) Register Description
| Register Name | ZDMA_CH_FCI |
|---|---|
| Offset Address | 0x0000000118 |
| Absolute Address |
0x00FFA80118 (ADMA_CH0) 0x00FFA90118 (ADMA_CH1) 0x00FFAA0118 (ADMA_CH2) 0x00FFAB0118 (ADMA_CH3) 0x00FFAC0118 (ADMA_CH4) 0x00FFAD0118 (ADMA_CH5) 0x00FFAE0118 (ADMA_CH6) 0x00FFAF0118 (ADMA_CH7) 0x00FD500118 (GDMA_CH0) 0x00FD510118 (GDMA_CH1) 0x00FD520118 (GDMA_CH2) 0x00FD530118 (GDMA_CH3) 0x00FD540118 (GDMA_CH4) 0x00FD550118 (GDMA_CH5) 0x00FD560118 (GDMA_CH6) 0x00FD570118 (GDMA_CH7) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000000 |
| Description | Channel Flow Control Register |
ZDMA_CH_FCI (ZDMA) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:6 | razRead as zero | 0x0 | Reserved for future use |
| PROG_CELL_CNT | 3:2 | rwNormal read/write | 0x0 | This field is used when flow control interface is enabled and it is attached to the DST side. These register fields can be used to limit the common buffer usage of the flow controlled channel. When FCI is controlling the write side, read DMA side is not controlled and may use the entire common buffer. This might starve/limit the bandwidth of other DMA channels. By programming the PROG_CELL_CNT, user can limit the number of 128/64-bit entries used by channel in common buffer. Maximum number of entries used by a channel: 0: 32 + AxLEN 1: 64 + AxLEN 2: 128 + AxLEN 3: 256 |
| SIDE | 1 | rwNormal read/write | 0x0 | 0: Flow Control Interface is attached to Read side when enabled 1: Flow Control Interface is attached to Write side when enabled |
| EN | 0 | rwNormal read/write | 0x0 | 0: Flow Control Interface Disable 1: Flow Control Interface Enable |