ZDMA_CH_IRQ_SRC_ACCT (ZDMA) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

ZDMA_CH_IRQ_SRC_ACCT (ZDMA) Register Description

Register NameZDMA_CH_IRQ_SRC_ACCT
Offset Address0x0000000190
Absolute Address 0x00FFA80190 (ADMA_CH0)
0x00FFA90190 (ADMA_CH1)
0x00FFAA0190 (ADMA_CH2)
0x00FFAB0190 (ADMA_CH3)
0x00FFAC0190 (ADMA_CH4)
0x00FFAD0190 (ADMA_CH5)
0x00FFAE0190 (ADMA_CH6)
0x00FFAF0190 (ADMA_CH7)
0x00FD500190 (GDMA_CH0)
0x00FD510190 (GDMA_CH1)
0x00FD520190 (GDMA_CH2)
0x00FD530190 (GDMA_CH3)
0x00FD540190 (GDMA_CH4)
0x00FD550190 (GDMA_CH5)
0x00FD560190 (GDMA_CH6)
0x00FD570190 (GDMA_CH7)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionSRC Interrupt Account Count Register

ZDMA_CH_IRQ_SRC_ACCT (ZDMA) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:8razRead as zero0x0Reserved for future use
CNT 7:0roRead-only0x0Indicate total number of Interrupt count after last read