ZDMA_CH_SRC_DSCR_WORD3 (ZDMA) Register Description
| Register Name | ZDMA_CH_SRC_DSCR_WORD3 |
|---|---|
| Offset Address | 0x0000000134 |
| Absolute Address |
0x00FFA80134 (ADMA_CH0) 0x00FFA90134 (ADMA_CH1) 0x00FFAA0134 (ADMA_CH2) 0x00FFAB0134 (ADMA_CH3) 0x00FFAC0134 (ADMA_CH4) 0x00FFAD0134 (ADMA_CH5) 0x00FFAE0134 (ADMA_CH6) 0x00FFAF0134 (ADMA_CH7) 0x00FD500134 (GDMA_CH0) 0x00FD510134 (GDMA_CH1) 0x00FD520134 (GDMA_CH2) 0x00FD530134 (GDMA_CH3) 0x00FD540134 (GDMA_CH4) 0x00FD550134 (GDMA_CH5) 0x00FD560134 (GDMA_CH6) 0x00FD570134 (GDMA_CH7) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000000 |
| Description | SRC DSCR Word 3 |
This register must remain stable while DMA Channel is enabled
ZDMA_CH_SRC_DSCR_WORD3 (ZDMA) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:5 | razRead as zero | 0x0 | Reserved for future use |
| CMD | 4:3 | rwNormal read/write | 0x0 | 00: Next descriptor is valid 01: Pause after completing this descriptor 10: STOP after completing this descriptor 11: Reserved This fields are not used in simple mode. This is provided for consistent view between simple mode cmds and SG descriptors |
| INTR | 2 | rwNormal read/write | 0x0 | 0: Completion interrupt is not required 1: Interrupt is set at the completion of this element. Completion indicates data has been read, but it may be in DMA buffer (and not yet written to destination). |
| TYPE | 1 | rwNormal read/write | 0x0 | 0: Current descriptor size is 128-bit (linear) 1: Current descriptor size is 256-bit (link list) This fields are not used in simple mode. This is provided for consistent view between simple mode cmds and SG descriptors |
| COHRNT | 0 | rwNormal read/write | 0x0 | This field is only valid for LPD DMA. FPD DMA does not support coherency at descriptor and data. 0: AXI transactions generated to process the descriptor payload are marked Non-coherent 1: AXI transaction generated to process the descriptor payload are marked coherent |