ZDMA_CH_SRC_START_LSB (ZDMA) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

ZDMA_CH_SRC_START_LSB (ZDMA) Register Description

Register NameZDMA_CH_SRC_START_LSB
Offset Address0x0000000158
Absolute Address 0x00FFA80158 (ADMA_CH0)
0x00FFA90158 (ADMA_CH1)
0x00FFAA0158 (ADMA_CH2)
0x00FFAB0158 (ADMA_CH3)
0x00FFAC0158 (ADMA_CH4)
0x00FFAD0158 (ADMA_CH5)
0x00FFAE0158 (ADMA_CH6)
0x00FFAF0158 (ADMA_CH7)
0x00FD500158 (GDMA_CH0)
0x00FD510158 (GDMA_CH1)
0x00FD520158 (GDMA_CH2)
0x00FD530158 (GDMA_CH3)
0x00FD540158 (GDMA_CH4)
0x00FD550158 (GDMA_CH5)
0x00FD560158 (GDMA_CH6)
0x00FD570158 (GDMA_CH7)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionSRC DSCR Start Address LSB Register

ZDMA_CH_SRC_START_LSB (ZDMA) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
ADDR31:0rwNormal read/write0x0Start Address LSB register for SRC descriptor fetch.