ZDMA_CH_WR_ONLY_WORD0 (ZDMA) Register Description
| Register Name | ZDMA_CH_WR_ONLY_WORD0 |
|---|---|
| Offset Address | 0x0000000148 |
| Absolute Address |
0x00FFA80148 (ADMA_CH0) 0x00FFA90148 (ADMA_CH1) 0x00FFAA0148 (ADMA_CH2) 0x00FFAB0148 (ADMA_CH3) 0x00FFAC0148 (ADMA_CH4) 0x00FFAD0148 (ADMA_CH5) 0x00FFAE0148 (ADMA_CH6) 0x00FFAF0148 (ADMA_CH7) 0x00FD500148 (GDMA_CH0) 0x00FD510148 (GDMA_CH1) 0x00FD520148 (GDMA_CH2) 0x00FD530148 (GDMA_CH3) 0x00FD540148 (GDMA_CH4) 0x00FD550148 (GDMA_CH5) 0x00FD560148 (GDMA_CH6) 0x00FD570148 (GDMA_CH7) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | Write Only Data Word 0 |
This register must remain stable while DMA Channel is enabled
ZDMA_CH_WR_ONLY_WORD0 (ZDMA) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| DATA | 31:0 | rwNormal read/write | 0x0 | In DMA write only mode, this bits are used to write the DST address location (bits [31:0]). Used for both LPD DMA and FPD DMA. |