ZDMA_CH_WR_ONLY_WORD1 (ZDMA) Register Description
Register Name | ZDMA_CH_WR_ONLY_WORD1 |
---|---|
Offset Address | 0x000000014C |
Absolute Address |
0x00FFA8014C (ADMA_CH0) 0x00FFA9014C (ADMA_CH1) 0x00FFAA014C (ADMA_CH2) 0x00FFAB014C (ADMA_CH3) 0x00FFAC014C (ADMA_CH4) 0x00FFAD014C (ADMA_CH5) 0x00FFAE014C (ADMA_CH6) 0x00FFAF014C (ADMA_CH7) 0x00FD50014C (GDMA_CH0) 0x00FD51014C (GDMA_CH1) 0x00FD52014C (GDMA_CH2) 0x00FD53014C (GDMA_CH3) 0x00FD54014C (GDMA_CH4) 0x00FD55014C (GDMA_CH5) 0x00FD56014C (GDMA_CH6) 0x00FD57014C (GDMA_CH7) |
Width | 32 |
Type | rwNormal read/write |
Reset Value | 0x00000000 |
Description | Write Only Data Word 1 |
This register must remain stable while DMA Channel is enabled
ZDMA_CH_WR_ONLY_WORD1 (ZDMA) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
DATA | 31:0 | rwNormal read/write | 0x0 | In DMA write only mode, this bits are used to write the DST address location (bits [63:32]). Used for both LPD DMA and FPD DMA. |