ZQ1PR1 (DDR_PHY) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

ZQ1PR1 (DDR_PHY) Register Description

Register NameZQ1PR1
Offset Address0x00000006A8
Absolute Address 0x00FD0806A8 (DDR_PHY)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000B0B
DescriptionZQ 1 Impedance Control Program Register 1

ZQ1PR1 (DDR_PHY) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:15roRead-only0x0Reserved. Return zeros on reads.
PU_REFSEL14:8rwNormal read/write0xBPull-up REFSEL for PZCTRL cell
Reserved 7roRead-only0x0Reserved. Return zeros on reads.
PD_REFSEL 6:0rwNormal read/write0xBPull-down REFSEL for PZCTRL cell