aes_iv_3 (CSU) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

aes_iv_3 (CSU) Register Description

Register Nameaes_iv_3
Offset Address0x000000104C
Absolute Address 0x00FFCA104C (CSU)
Width32
TyperoRead-only
Reset Value0x00000000
DescriptionAES IV 3

aes_iv_3 (CSU) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
aes_iv_dlc31:0roRead-only0x0AES initialization vector [31:0]. The AES only uses the first 96-bits of the IV for counter initialization. The value stored here will be the decyrpt length count, which is the amount of encrypted configuration data associated with the current AES key.