afifm3M_intfpd_fn_mod (FPD_GPV) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

afifm3M_intfpd_fn_mod (FPD_GPV) Register Description

Register Nameafifm3M_intfpd_fn_mod
Offset Address0x000004A108
Absolute Address 0x00FD74A108 (FPD_GPV)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionIssuing functionality modification register

This register sets the block issuing capability to one outstanding transaction.The register bits are active high and have the following purpose:0 Read issuing, read_iss_override. 1 Write issuing, write_iss_override

afifm3M_intfpd_fn_mod (FPD_GPV) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
fn_mod 1:0rwNormal read/write0x0