ctrl (FPD_SLCR_SECURE) Register Description
Register Name | ctrl |
---|---|
Offset Address | 0x0000000004 |
Absolute Address | 0x00FD690004 (FPD_SLCR_SECURE) |
Width | 1 |
Type | rwNormal read/write |
Reset Value | 0x00000000 |
Description | General control register for the LPD SLCR SECURE. |
ctrl (FPD_SLCR_SECURE) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
slverr_enable | 0 | rwNormal read/write | 0x0 | By default, invalid address requests are ignored. However, a maskable interrupt exists. By enabling this slverr_enable, invalid address requests cause a slverr to occur. Enable/Disable SLVERR during address decode failure. 0: SLVERR is disabled. Register write is ignored. Read returns 0. 1: SLVERR is enabled. SLVERR is asserted. Register write is ignored. Read returns 0. |