designcfg_debug3 (GEM) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

designcfg_debug3 (GEM) Register Description

Register Namedesigncfg_debug3
Offset Address0x0000000288
Absolute Address 0x00FF0B0288 (GEM0)
0x00FF0C0288 (GEM1)
0x00FF0D0288 (GEM2)
0x00FF0E0288 (GEM3)
Width32
TyperoRead-only
Reset Value0x04000000
DescriptionDesign Configuration Register 3

designcfg_debug3 (GEM) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:30roRead-only0x0Unused, read zero
num_spec_add_filters29:24roRead-only0x4Takes the value of the `num_spec_add_filters DEFINE
Reserved23:0roRead-only0x0Unused, read zero
- reserved for `gem_rx_fifo_size DEFINE in internal FIFO mode