designcfg_debug6 (GEM) Register Description
| Register Name | designcfg_debug6 |
|---|---|
| Offset Address | 0x0000000294 |
| Absolute Address |
0x00FF0B0294 (GEM0) 0x00FF0C0294 (GEM1) 0x00FF0D0294 (GEM2) 0x00FF0E0294 (GEM3) |
| Width | 32 |
| Type | roRead-only |
| Reset Value | 0x02510002 |
| Description | Design Configuration Register 6 |
designcfg_debug6 (GEM) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:26 | roRead-only | 0x0 | Reserved. Set to zero. |
| pbuf_cutthru | 25 | roRead-only | 0x1 | Takes the value of the `gem_pbuf_cutthru DEFINE |
| pfc_multi_quantum | 24 | roRead-only | 0x0 | Takes the value of the `gem_pfc_multi_quantum DEFINE |
| dma_addr_width_is_64b | 23 | roRead-only | 0x0 | Takes the value of the `gem_dma_addr_width_is_64b DEFINE |
| host_if_soft_select | 22 | roRead-only | 0x1 | Takes the value of the `gem_host_if_soft_select DEFINE |
| tx_add_fifo_if | 21 | roRead-only | 0x0 | Takes the value of the `gem_tx_add_fifo_if DEFINE |
| ext_tsu_timer | 20 | roRead-only | 0x1 | Takes the value of the `gem_ext_tsu_timer DEFINE |
| tx_pbuf_queue_segment_size | 19:16 | roRead-only | 0x1 | Takes the value of the `gem_tx_pbuf_queue_segment_size DEFINE |
| dma_priority_queue15 | 15 | roRead-only | 0x0 | Takes the value of the `dma_priority_queue15 DEFINE |
| dma_priority_queue14 | 14 | roRead-only | 0x0 | Takes the value of the `dma_priority_queue14 DEFINE |
| dma_priority_queue13 | 13 | roRead-only | 0x0 | Takes the value of the `dma_priority_queue13 DEFINE |
| dma_priority_queue12 | 12 | roRead-only | 0x0 | Takes the value of the `dma_priority_queue12 DEFINE |
| dma_priority_queue11 | 11 | roRead-only | 0x0 | Takes the value of the `dma_priority_queue11 DEFINE |
| dma_priority_queue10 | 10 | roRead-only | 0x0 | Takes the value of the `dma_priority_queue10 DEFINE |
| dma_priority_queue9 | 9 | roRead-only | 0x0 | Takes the value of the `dma_priority_queue9 DEFINE |
| dma_priority_queue8 | 8 | roRead-only | 0x0 | Takes the value of the `dma_priority_queue8 DEFINE |
| dma_priority_queue7 | 7 | roRead-only | 0x0 | Takes the value of the `dma_priority_queue7 DEFINE |
| dma_priority_queue6 | 6 | roRead-only | 0x0 | Takes the value of the `dma_priority_queue6 DEFINE |
| dma_priority_queue5 | 5 | roRead-only | 0x0 | Takes the value of the `dma_priority_queue5 DEFINE |
| dma_priority_queue4 | 4 | roRead-only | 0x0 | Takes the value of the `dma_priority_queue4 DEFINE |
| dma_priority_queue3 | 3 | roRead-only | 0x0 | Takes the value of the `dma_priority_queue3 DEFINE |
| dma_priority_queue2 | 2 | roRead-only | 0x0 | Takes the value of the `dma_priority_queue2 DEFINE |
| dma_priority_queue1 | 1 | roRead-only | 0x1 | Takes the value of the `dma_priority_queue1 DEFINE |
| Reserved | 0 | roRead-only | 0x0 | Reserved. Set to zero. |