dpram_fill_dbg (GEM) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

dpram_fill_dbg (GEM) Register Description

Register Namedpram_fill_dbg
Offset Address0x00000000F8
Absolute Address 0x00FF0B00F8 (GEM0)
0x00FF0C00F8 (GEM1)
0x00FF0D00F8 (GEM2)
0x00FF0E00F8 (GEM3)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionThe fill levels for the TX & RX packet buffers can be read using this register, including the fill level for each queue in the TX direction.

dpram_fill_dbg (GEM) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
dma_tx_rx_fill_level31:16roRead-only0x0Fill Level - TX or RX packet buffer fill level, selected by the tx_q_fill_level_select and tx_rx_fill_level_select registers. Read this register to determine the fill level.
Reserved15:8roRead-only0x0Reserved, read as 0, ignored on write.
dma_tx_q_fill_level_select 7:4rwNormal read/write0x0TX queue fill level select - select what TX queue to report fill levels for.
Reserved 3:1roRead-only0x0Reserved, read as 0, ignored on write.
dma_tx_rx_fill_level_select 0rwNormal read/write0x0TX/RX Fill Level select - report the fill level for the TX or RX packet buffer.