gpu (FPD_SLCR) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

gpu (FPD_SLCR) Register Description

Register Namegpu
Offset Address0x000000100C
Absolute Address 0x00FD61100C (FPD_SLCR)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000007
DescriptionGPU Idle status Register

gpu (FPD_SLCR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
arcache10:7rwNormal read/write0x0GPU ARCACHE register
awcache 6:3rwNormal read/write0x0GPU AWCACHE register
pp1_idle 2roRead-only0x1PP1 is idle
pp0_idle 1roRead-only0x1PP0 is idle
idle 0roRead-only0x1Full GPU idle