int_q1_status (GEM) Register Description
| Register Name | int_q1_status |
|---|---|
| Offset Address | 0x0000000400 |
| Absolute Address |
0x00FF0B0400 (GEM0) 0x00FF0C0400 (GEM1) 0x00FF0D0400 (GEM2) 0x00FF0E0400 (GEM3) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000000 |
| Description | Priority Queue Interrupt Status Register |
int_q1_status (GEM) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:12 | roRead-only | 0x0 | Reserved, read as 0, ignored on write. |
| resp_not_ok | 11 | rwNormal read/write | 0x0 | bresp/hresp not OK |
| receive_overrun | 10 | rwNormal read/write | 0x0 | Receive overrun |
| Reserved | 9:8 | roRead-only | 0x0 | Reserved, read as 0, ignored on write. |
| transmit_complete | 7 | rwNormal read/write | 0x0 | Transmit complete |
| amba_error | 6 | rwNormal read/write | 0x0 | Transmit frame corruption due to AMBA (AHB/AXI) error set if an error occurs whilst midway through reading transmit frame from the external memory, including HRESP errors(AHB), RRESP and BRESP errors (AXI) and buffers exhausted mid frame |
| retry_limit_exceeded_or_late_collision | 5 | rwNormal read/write | 0x0 | Retry limit exceeded or late collision |
| Reserved | 4:3 | roRead-only | 0x0 | Reserved, read as 0, ignored on write. |
| rx_used_bit_read | 2 | rwNormal read/write | 0x0 | RX used bit read |
| receive_complete | 1 | rwNormal read/write | 0x0 | Receive complete |
| Reserved | 0 | roRead-only | 0x0 | Reserved, read as 0, ignored on write. |