late_collisions (GEM) Register Description
Register Name | late_collisions |
---|---|
Offset Address | 0x0000000144 |
Absolute Address |
0x00FF0B0144 (GEM0) 0x00FF0C0144 (GEM1) 0x00FF0D0144 (GEM2) 0x00FF0E0144 (GEM3) |
Width | 32 |
Type | mixedMixed types. See bit-field details. |
Reset Value | 0x00000000 |
Description | Late Collisions |
late_collisions (GEM) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
Reserved | 31:10 | roRead-only | 0x0 | Reserved, read as 0, ignored on write. |
count | 9:0 | rwNormal read/write | 0x0 | Late collisions - a 10 bit register counting the number of late collision occurring after the slot time (512 bits) has expired. In 10/100 mode, late collisions are counted twice i.e. both as a collision and a late collision. In gigabit mode, a late collision causes the transmission to be aborted, thus the single and multi collision registers are not updated. |