mask_add1_bottom (GEM) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

mask_add1_bottom (GEM) Register Description

Register Namemask_add1_bottom
Offset Address0x00000000C8
Absolute Address 0x00FF0B00C8 (GEM0)
0x00FF0C00C8 (GEM1)
0x00FF0D00C8 (GEM2)
0x00FF0E00C8 (GEM3)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionSpecific Address Mask 1 Bottom 31:0

mask_add1_bottom (GEM) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
address_mask31:0rwNormal read/write0x0Specific Address Mask. Setting a bit to one masks the corresponding bit in the specific address 1 register