mask_add1_top (GEM) Register Description
| Register Name | mask_add1_top |
|---|---|
| Offset Address | 0x00000000CC |
| Absolute Address |
0x00FF0B00CC (GEM0) 0x00FF0C00CC (GEM1) 0x00FF0D00CC (GEM2) 0x00FF0E00CC (GEM3) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000000 |
| Description | Specific Address Mask 1 Top 47:32 |
mask_add1_top (GEM) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:16 | roRead-only | 0x0 | Reserved, read as 0, ignored on write. |
| address_mask | 15:0 | rwNormal read/write | 0x0 | Specific Address Mask. Setting a bit to one masks the corresponding bit in the specific address 1 register |