octets_rxed_bottom (GEM) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

octets_rxed_bottom (GEM) Register Description

Register Nameoctets_rxed_bottom
Offset Address0x0000000150
Absolute Address 0x00FF0B0150 (GEM0)
0x00FF0C0150 (GEM1)
0x00FF0D0150 (GEM2)
0x00FF0E0150 (GEM3)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionOctets Received 31:0

octets_rxed_bottom (GEM) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
count31:0rwNormal read/write0x0Received octets in frame without errors [31:0]. The number of octets received in valid frames of any type. This counter is 48-bits and is read through two registers. This count does not include octets from pause frames, and is only incremented if the frame is successfully filtered and copied to memory.