pause_frames_txed (GEM) Register Description
| Register Name | pause_frames_txed |
|---|---|
| Offset Address | 0x0000000114 |
| Absolute Address |
0x00FF0B0114 (GEM0) 0x00FF0C0114 (GEM1) 0x00FF0D0114 (GEM2) 0x00FF0E0114 (GEM3) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000000 |
| Description | Pause Frames Transmitted |
pause_frames_txed (GEM) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:16 | roRead-only | 0x0 | Reserved, read as 0, ignored on write. |
| count | 15:0 | rwNormal read/write | 0x0 | Transmitted pause frames - a 16 bit register counting the number of pause frames transmitted. Only pause frames triggered by the register interface or through the external pause pins are counted as pause frames. Pause frames received through the external FIFO interface are counted in the frames transmitted counter. |