pcieM_intfpd_ib_fn_mod2 (FPD_GPV) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

pcieM_intfpd_ib_fn_mod2 (FPD_GPV) Register Description

Register NamepcieM_intfpd_ib_fn_mod2
Offset Address0x000004E024
Absolute Address 0x00FD74E024 (FPD_GPV)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionThis register is only present if upsizing or downsizing happens

pcieM_intfpd_ib_fn_mod2 (FPD_GPV) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
bypass_merge 0rwNormal read/write0x0If bypass_merge is set to 1, the network does not alter any transactions that could pass through legally without alteration.