pcs_an_lp_base (GEM) Register Description
Register Name | pcs_an_lp_base |
---|---|
Offset Address | 0x0000000214 |
Absolute Address |
0x00FF0B0214 (GEM0) 0x00FF0C0214 (GEM1) 0x00FF0D0214 (GEM2) 0x00FF0E0214 (GEM3) |
Width | 32 |
Type | roRead-only |
Reset Value | 0x00000000 |
Description | For non SGMII (default) mode, the value of this register contains the link partners base page received information. This register is updated in the ABILITY_DETECT state of the PCS auto-negotiation state machine so bit 14 will only be set if the link partner is sending acknowledge while the PCS in this state. The register is not updated in the ACK_DETECT state. For SGMII mode, the contents of this register change to the one defined in the SGMII standard. The value of this register contains the link partners base page received information. In this case the link partner is the PHY connected by the SGMII. |
pcs_an_lp_base (GEM) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
Reserved | 31:16 | roRead-only | 0x0 | Reserved. Set to zero. |
link_partner_next_page_status | 15 | roRead-only | 0x0 | The contents of this register change depending on SGMII or non SGMII (default) mode.Default Mode:Link partner next page - when set active high, this bit indicates the link partners intention to exchange next pages.SGMII Mode: Link Status.0: Link Down.1: Link Up. |
link_partner_acknowledge | 14 | roRead-only | 0x0 | Link partner acknowledge - indicates the link partner has successfully received the transmitted base page |
link_partner_remote_fault_duplex_mode | 13:12 | roRead-only | 0x0 | The contents of this register change depending on SGMII or non SGMII (default) mode.Default Mode:Link partner remote fault [1:0] - indicates and classifies a remote fault condition has been detected by the link partner as follows:00: No error, Link O.K.01: Link Failure.10: Off line. 11: Auto-negotiation error.SGMII Mode: Bit 13: Reserved. Read as Zero.Bit 12: 0: Half Duplex. 1: Full Duplex. |
speed_reserved | 11:9 | roRead-only | 0x0 | The contents of this register change depending on SGMII or non SGMII (default) mode.Default Mode: Reserved. Set to zero.SGMII Mode: Bits 11:10: Speed: 11: Reserved10: 1000 Mbps01: 100Mbps00: 10 Mbps Bit 9: Reserved. Read as Zero. |
pause | 8:7 | roRead-only | 0x0 | The contents of this register change depending on SGMII or non SGMII (default) mode.Default Mode: Pause[1:0] - provides the link partners pause frame capability as follows:00: No pause. 01: Symmetric pause. 10: Asymmetric pause toward link partner. 11: Both symmetric pause and asymmetric pause toward link device.SGMII Mode: Reserved. Read as Zero. |
link_partner_half_duplex | 6 | roRead-only | 0x0 | The contents of this register change depending on SGMII or non SGMII (default) mode.Default Mode: Link partner half duplex - this bit indicates whether the link partner is capable of supporting half duplex operation. 0: The link partner cannot support half duplex. 1: The link partner can support half duplex.SGMII Mode: Reserved. Read as Zero. |
link_partner_full_duplex | 5 | roRead-only | 0x0 | The contents of this register change depending on SGMII or non SGMII (default) mode.Default Mode: Link partner full duplex - this bit indicates whether the link partner is capable of supporting full duplex operation. 0: The link partner cannot support full duplex. 1: The link partner can support full duplex.SGMII Mode: Reserved. Read as Zero. |
Reserved | 4:0 | roRead-only | 0x0 | Reserved. Set to zero. |