pcs_control (GEM) Register Description
Register Name | pcs_control |
---|---|
Offset Address | 0x0000000200 |
Absolute Address |
0x00FF0B0200 (GEM0) 0x00FF0C0200 (GEM1) 0x00FF0D0200 (GEM2) 0x00FF0E0200 (GEM3) |
Width | 32 |
Type | mixedMixed types. See bit-field details. |
Reset Value | 0x00001040 |
Description | Note:All PCS registers are defined in the IEEE 802.3 Standard. PCS Control RegisterThis register provides the main control functions with respect to the PCS. |
pcs_control (GEM) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
Reserved | 31:16 | roRead-only | 0x0 | Reserved. Set to zero. |
pcs_software_reset | 15 | rwNormal read/write | 0x0 | PCS software reset - written by software to force the hardware logic into a reset state. This bit is self clearing. When reading this bit, logic 1 is returned until both the soft reset has completed and the PCS is enabled through the PCS select bit of the network configuration register. Writing logic 0 has no effect. |
loopback_mode | 14 | rwNormal read/write | 0x0 | Loopback mode - the ewrap output pin of the GEM reflects this control bit, and can be used to select loopback mode in the PHY transceiver. 0: Loopback mode disabled. 1: Loopback mode enabled. |
speed_select_bit_1 | 13 | roRead-only | 0x0 | Speed select bit 1 - combined with speed select [0] to indicate the speed of operation of the PCS. As the GEM PCS is only intended to operate at 1000 Mbps, this bit is hardwired to logic 0. |
enable_auto_neg | 12 | rwNormal read/write | 0x1 | Enable auto-negotiation - when set active high, auto-negotiation operation is enabled. |
Reserved | 11:10 | roRead-only | 0x0 | Reserved. Set to zero. |
restart_auto_neg | 9 | rwNormal read/write | 0x0 | Restart auto-negotiation - when set active high, the hardware restarts auto-negotiation. This bit is self clearing, but once set shall remain in this state until auto-negotiation has restarted. Writing logic 0 has no effect. |
mac_duplex_state | 8 | roRead-only | 0x0 | MAC Duplex state. This returns the value of the MACs duplex state as indicated in bit 1 of the MACs network configuration register. |
collision_test | 7 | rwNormal read/write | 0x0 | Collision test - when set active high, the PCS generates collisions on transmit. This bit should only be set for test purposes. |
speed_select_bit_0 | 6 | roRead-only | 0x1 | Speed select bit 0 - combined with speed select [1] to indicate the speed of operation of the PCS. As the GEM PCS is only intended to operate at 1000 Mbps, this bit is hardwired to logic 1. |
Reserved | 5:0 | roRead-only | 0x0 | Reserved. Set to zero. |