single_collisions (GEM) Register Description
| Register Name | single_collisions |
|---|---|
| Offset Address | 0x0000000138 |
| Absolute Address |
0x00FF0B0138 (GEM0) 0x00FF0C0138 (GEM1) 0x00FF0D0138 (GEM2) 0x00FF0E0138 (GEM3) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000000 |
| Description | Single Collision Frames |
single_collisions (GEM) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:18 | roRead-only | 0x0 | Reserved, read as 0, ignored on write. |
| count | 17:0 | rwNormal read/write | 0x0 | Single collision frames - an 18 bit register counting the number of frames experiencing a single collision before being successfully transmitted, i.e. no under run. |