tamper_status (CSU) Register

Zynq UltraScale+ Devices Register Reference (UG1087)
Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

tamper_status (CSU) Register Description

Register Nametamper_status
Offset Address0x0000005000
Absolute Address 0x00FFCA5000 (CSU)
Width32
TypewtcReadable, write a 1 to clear
Reset Value0x00000000
DescriptionTamper Response Status

tamper_status (CSU) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
tamper_1212wtcReadable, write a 1 to clear0x0PS SysMon voltage alarm for PS GTR (VCC or VTT).
tamper_1111wtcReadable, write a 1 to clear0x0PS SysMon voltage alarm for PSIO bank 3 (dedicated pins).
tamper_1010wtcReadable, write a 1 to clear0x0PS SysMon voltage alarm for PSIO bank 0/1/2 (any of the 3 voltage nodes).
tamper_9 9wtcReadable, write a 1 to clear0x0PS SysMon voltage alarm for VCC_PSINTFP_DDR.
tamper_8 8wtcReadable, write a 1 to clear0x0PS SysMon voltage alarm for VCC_PSAUX.
tamper_7 7wtcReadable, write a 1 to clear0x0PS SysMon voltage alarm for VCC_PSINTFP.
tamper_6 6wtcReadable, write a 1 to clear0x0PS SysMon voltage alarm for VCC_PSINTLP.
tamper_5 5wtcReadable, write a 1 to clear0x0PS SysMon over temperature alarm for FPD.
tamper_4 4wtcReadable, write a 1 to clear0x0PS SysMon over temperature alarm for LPD.
tamper_3 3wtcReadable, write a 1 to clear0x0PL SEU or other PL error, including bitstream readback.
tamper_2 2wtcReadable, write a 1 to clear0x0PS JTAG TCK clock toggle detect; source cleared by LPD power cycle.
tamper_1 1wtcReadable, write a 1 to clear0x0External MIO pin.
tamper_0 0wtcReadable, write a 1 to clear0x0CSU register.