trd (EFUSE) Register Description
| Register Name | trd |
|---|---|
| Offset Address | 0x000000001C |
| Absolute Address | 0x00FFCC001C (EFUSE) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x0000001B |
| Description | Read Strobe Width |
trd (EFUSE) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| value | 7:0 | rwNormal read/write | 0x1B | Count value for read strobe duration with respect to the SYSOSC clock. Default value assumes 220MHz reference clock and 150ns strobe width. This value can be adjusted based on the following equation ceiling(150ns / efuse_clk period) where efuse_clk is selected by the CFG register. |