tsu_h_ps (EFUSE) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

tsu_h_ps (EFUSE) Register Description

Register Nametsu_h_ps
Offset Address0x0000000020
Absolute Address 0x00FFCC0020 (EFUSE)
Width32
TyperwNormal read/write
Reset Value0x000000FF
DescriptionPS to STROBE timing

tsu_h_ps (EFUSE) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
value 7:0rwNormal read/write0xFFCount value for the PS to STROBE setup/hold timing parameter. The default value is set to max and should be reconfigured for the efuse_clk used to program the EFUSE. This value is calculated using the following equation: ceiling(67ns / efuse_clk period)