tsu_peer_rx_msb_sec (GEM) Register Description
| Register Name | tsu_peer_rx_msb_sec |
|---|---|
| Offset Address | 0x00000000F4 |
| Absolute Address |
0x00FF0B00F4 (GEM0) 0x00FF0C00F4 (GEM1) 0x00FF0D00F4 (GEM2) 0x00FF0E00F4 (GEM3) |
| Width | 32 |
| Type | roRead-only |
| Reset Value | 0x00000000 |
| Description | PTP Peer Event Frame Received Seconds Register 47:32 |
tsu_peer_rx_msb_sec (GEM) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:16 | roRead-only | 0x0 | Reserved, read as 0, ignored on write. |
| timer_seconds | 15:0 | roRead-only | 0x0 | PTP Peer Event Frame RX Seconds. The register is updated with the value that the 1588 timer seconds register held when the SFD of a PTP receive peer event crosses the MII interface. The actual update occurs when the GEM recognizes the frame as a PTP pdelay_req or pdelay_resp frame. An interrupt is issued when the register is updated. |